Careers · Engineering

FPGA Engineer

Design the hardware path: feed decoding, book building and pre-trade checks on FPGA, at line rate.

Lugano · Full time · In the office most days

The firm

Exiorum is a proprietary trading firm in Lugano, founded in 2020. It trades its own capital: market making and systematic trading in equities, futures, options and digital assets.

40+ people. No outside investors. Everyone codes.

The role

The fastest paths at Exiorum run on FPGA: market data decoding, book building, and the order path with its risk checks.

You own designs from RTL through verification to deployment in the data centre, and the tooling that measures them.

What you will do

  • Design and implement RTL for feed handlers, book builders, order gateways and risk checks.
  • Verify designs with simulation and hardware-in-the-loop testing against captured data.
  • Meet timing and resource budgets on the target parts, and document them.
  • Build the software interfaces with the C++ team: drivers, DMA, configuration.
  • Support deployment and monitoring of FPGA systems in production.

What we look for

  • Strong RTL design in SystemVerilog or VHDL, with designs that have run in production.
  • Experience with 10, 25 or 100G Ethernet, PCIe and DMA on FPGA.
  • Verification discipline: testbenches, simulation, coverage.
  • Working C++ and Linux.
  • Evidence of capability. A degree is not required.

Useful, not required

  • HLS.
  • Exchange protocols.
  • Timing closure on large AMD or Intel parts.

Format and offer

Lugano. In the office most days, with remote days agreed within the team. Support with Swiss work permits for the right person.

Base salary plus a discretionary bonus linked to the results you contribute to. Your choice of equipment, 28 days of leave plus public holidays, a health insurance contribution, an occupational pension above the legal minimum, a learning budget, and lunch in the office. Details on the careers page.

How to apply

Email hr@exiorum.com with the role in the subject line, a CV or a link to your work, and a few lines on what you have done that is relevant. No cover letter needed. The process has five steps and a decision within 3 days of the on-site.

Apply for FPGA Engineer